EPC16UC88 vs EPC16U188N 对比
详细并排对比 EPC16UC88 出自 Altera 和 EPC16U188N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPC16UC88 | EPC16U188N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | Memory ICs | FPGA & CPLD |
| 生命周期状态 | Unknown | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $0.00 | $19.95 |
| Device Type | In-system programmable configuration PROM for FPGAs | — |
| Configuration Memory Capacity | 16 Mb | — |
| 电源电压 | 3.3 V core and I/O | — |
| 封装 | 88-UBGA (11x8) | 188-ball Ultra FineLine BGA (UBGA) |
| Package Family | UBGA | — |
| In-System Programmability | IEEE Std. 1532 compatible | — |
| Programming Language Support | Jam Standard Test and Programming Language (STAPL) | — |
| JTAG Boundary Scan | Supported | — |
| nINIT_CONF Function | Allows private JTAG instruction to start FPGA configuration | — |
| Configuration Architecture | Configuration controller and flash memory | — |
| FPGA Configuration Use | Automatic configuration after power-up or system initialization | — |
| Data Output | Configuration data output controlled by OE and nCS | — |
| Output Control | OE and nCS control tri-state buffer and address counter | — |
| 安装类型 | Surface mount | Surface Mount (BGA) |
| Package Dimensions | 11 mm x 8 mm | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| 工作温度 | [DATA_NEEDED: operating temperature] | -40C to +85C |
| Output Current | [DATA_NEEDED: output current] | — |
| Configuration Frequency | [DATA_NEEDED: configuration frequency] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| 存储器类型 | — | In-System Programmable Configuration PROM |
| Memory Density | — | 16 Mbit |
| FPGA Family Support | — | Altera Cyclone, Stratix, APEX series |
| Configuration Modes | — | FPP, PS, AS, JTAG |
| Decompression | — | Built-in (multiplier 1x, 2x, 4x) |
| 接口 | — | Parallel Flash Interface (PIA), JTAG (IEEE 1149.1) |
| I/O Voltage Support | — | 1.8V, 2.5V, 3.3V, 5.0V |
| Endurance | — | 100,000 erase/program cycles |
| Data Retention | — | 20 years |
| Programming Interface | — | IEEE 1149.1 JTAG |
| MSL 等级 | — | 3 (168 hours) |