EPC18QI100 vs EPC8QI100 对比

详细并排对比 EPC18QI100 出自 Altera 和 EPC8QI100 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC18QI100 EPC8QI100
品牌 Altera Intel
分类 Memory ICs Memory ICs
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $10.40 $10.85
Manufacturer Altera (now Intel Programmable Solutions Group) —
Device Type FPGA Configuration PROM (nonvolatile) —
Memory Density 18 Mbit (18,874,368 bits) —
Configuration Interface Altera serial (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 3.3 V or 5 V tolerant —
Programming Interface JTAG (IEEE 1149.1) in-system programmable —
Cascading Support Yes (via nCASC pin, multi-device chains supported) —
封装 100-pin PQFP (Plastic Quad Flat Pack) 100-PQFP (20 x 14 mm)
Package Dimensions 14 mm x 20 mm x 1.4 mm (body) / 3.4 mm (overall incl. leads) —
工作温度范围 -40 C to +85 C (industrial) —
安装类型 Surface Mount Surface Mount
MSL 等级 [DATA_NEEDED: MSL level] —
Lead Finish Matte tin (lead-free, per Altera Pb-free roadmap) —
RoHS 状态 Compliant (Pb-free part marking) Non-compliant (legacy PQFP, lead-bearing)
Configuration Time [DATA_NEEDED: configuration time at typical DCLK] —
End-of-Life Status Obsolete; replaced by Altera/Intel EPCQ family —
存储器类型 — Flash (NOR, Enhanced Configuration PROM)
存储容量 — 8 Mbit
Supply Voltage (Core) — 3.3 V
Supply Voltage (I/O) — 3.3 V
接口 — Altera FPGA configuration serial/parallel (FPP) + JTAG (IEEE 1149.1)
In-System Programmability — IEEE Std. 1532 compliant
Programming Language — Jam STAPL
Boundary Scan — JTAG boundary-scan test supported
Data Compression — Yes (increases effective capacity)
Configuration Controller — On-chip, dedicated to Altera FPGAs
Initiate-Configuration Pin — nINIT_CONF (private JTAG instruction)
工作温度 — -40C to +85C (industrial)
Compatible FPGAs — Stratix, Stratix II, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, Cyclone, Cyclone II, Arria GX, Stratix GX, Stratix II GX

数据手册与资源

浏览全部产品 创建 BOM 获取报价