EPC1L20 vs EPC1LC20-W 对比
详细并排对比 EPC1L20 出自 Altera 和 EPC1LC20-W 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPC1L20 | EPC1LC20-W |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | Memory ICs | Memory ICs |
| 生命周期状态 | 有效 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $3.75 | $9.85 |
| 存储器类型 | OTP Configuration PROM (Flash) | OTP (One-Time Programmable) Configuration PROM |
| 存储容量 | 1 Mbit | 1 Mbit |
| Configuration Clock (max) | 8 MHz | — |
| Flash Access Time | 90 ns (approx.) | — |
| Max Read Bandwidth | 160 Mbps (16-bit DQ bus) | — |
| 接口 | Serial / FPP configuration + JTAG (IEEE 1149.1) | Altera serial configuration (DCLK / DATA / nCONFIG / nSTATUS) |
| 电源电压 | 3.3 V (typical) | 3.3 V and 5.0 V |
| Programmability | One-Time Programmable (OTP) | — |
| 封装 | 20-pin PLCC (9x9 mm) | 20-PLCC J-lead (9x9 mm) |
| 安装类型 | Through-Hole / Socket | Surface Mount (PLCC socket or direct solder) |
| 工作温度 | [DATA_NEEDED: operating temperature range] | — |
| JTAG / ISP Support | Yes (IEEE 1149.1) | — |
| Compatible FPGA Series | Stratix, Cyclone, APEX, FLEX, ACEX, LUT-based families | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance] | Compliant (Pb-free -W finish) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Configuration Clock (DCLK) | — | 8 MHz maximum |
| In-System Programming | — | Yes - IEEE 1149.1 (JTAG) ISP at 3.3 V / 5.0 V |
| Lead Finish | — | Pb-free (matte tin) - "-W" suffix |
| Daisy-Chain Support | — | Yes - multiple EPC1 / EPC2 devices cascade to program larger FPGAs |
| Compression Support | — | Yes - stores compressed Altera FPGA bitstreams |
| 工作温度范围 | — | [DATA_NEEDED: operating temperature range] |
| Programming Cycles | — | 1 (OTP) |
| Target FPGA Families | — | Cyclone, FLEX 6000 / 10K / 10KE, ACEX 1K, APEX 20K, Mercury |