EPC1LC120 vs EPC1LC20-WCEC52 对比

详细并排对比 EPC1LC120 出自 Altera 和 EPC1LC20-WCEC52 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC1LC120 EPC1LC20-WCEC52
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 有效 Obsolete
库存状态 有库存 有库存
单价(USD) $9.30 $7.45
存储器类型 Serial Configuration Memory (Flash-based, non-volatile) OTP Configuration PROM (Anti-fuse)
Memory Density 1 Mbit —
Serial Clock Frequency (DCLK) 8 MHz —
Supported FPGA Families APEX 20K, ACEX 1K, Cyclone, MAX, Mercury, Stratix-class —
接口 Altera / Intel proprietary FPGA-configuration serial bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) Serial (Altera FPP/PS configuration protocol)
封装 LQFP-120 (Low-profile Quad Flat Pack) 20-pin PLCC (J-lead, through-hole, 9x9 mm)
安装类型 Surface Mount —
工作温度范围 [DATA_NEEDED: operating temperature range] —
电源电压 [DATA_NEEDED: VCC range] —
Programming Factory / JTAG via Altera programming tools —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
MSL 等级 [DATA_NEEDED: MSL rating] —
Lead-Free [DATA_NEEDED: lead-free status] [DATA_NEEDED: lead-free status]
Configuration Mode Serial configuration of SRAM-based FPGAs —
Compatible Bitstream Width Serial —
存储容量 — 1 Mbit (1,048,576 bits)
存储组织 — 212,942 x 1 bit
Configuration Clock (DCLK) — 8 MHz maximum
Supply Voltage (VCC) — 3.3 V
I/O Voltage Tolerance — 5.0 V (FPGA interface)
In-System Programmability — Yes (IEEE 1149.1 JTAG)
Programmability — One-Time Programmable (OTP)
工作温度 — -40C to +85C (industrial)
Package Mounting — Through-hole (also accepts PLCC socket)
Compatible FPGA Families — Cyclone, Stratix, APEX, ACEX, MAX series
Programming Interface — JTAG (IEEE Std 1149.1) ISP
引脚数量 — 20
生命周期状态 — Obsolete (recommended replacement: EPCQ family or newer serial config devices)

数据手册与资源

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