EPC2L20 vs EPC2LI20 对比

详细并排对比 EPC2L20 出自 Altera 和 EPC2LI20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2L20 EPC2LI20
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $25.80 $5.95
存储器类型 Configuration PROM (non-volatile) Flash (in-system programmable)
存储容量 1.6 Mbit 1.6 Mb (1,572,864 bits)
存储组织 8-bit byte —
接口 Serial FPGA configuration + JTAG (IEEE 1149.1 / IEEE 1532) —
Programmability In-system programmable via JTAG —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 3.3 V or 5.0 V (VCCSEL selectable) —
Cascade Support Yes - multi-device daisy chain —
Boundary Scan JTAG IEEE 1149.1 BST —
封装 20-pin PLCC (J-lead) —
安装类型 Surface Mount (PLCC socket compatible) Surface Mount (PLCC socket-compatible)
工作温度 [DATA_NEEDED: operating temperature range] -40 C to +85 C (Industrial)
MSL 等级 [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL level]
RoHS 状态 RoHS Compliant (per IC Components listing) [DATA_NEEDED: RoHS status]
Process Technology Low-power CMOS —
Target FPGAs APEX II, APEX 20K, Mercury, ACEX 1K, Cyclone, Stratix —
Programmable Type — In System Programmable (ISP)
功能 — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
封装 / 外壳 — 20-PLCC (J-lead, 9x9 mm)
Configuration Interface — Serial or Byte-wide (parallel)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)

数据手册与资源

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