EPC2LC20-T vs EPC2LC20 对比

详细并排对比 EPC2LC20-T 出自 Altera 和 EPC2LC20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPC2LC20-T EPC2LC20-T - 1.6Mb FPGA Config PROM PLCC-20 | Altera

EPC2LC20-T - 1.6Mb FPGA Config PROM PLCC-20 | Altera

EPC2LC20-T ⚠ 最后一次采购

规格对比

参数 EPC2LC20-T EPC2LC20
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 最后采购期 不推荐新设计
库存状态 有库存 有库存
单价(USD) $7.40 $7.20
存储器类型 Configuration PROM (Flash) Non-volatile configuration PROM
存储容量 1.6 Mb 1.6 Mbit
Configuration Mode Serial (PS mode), cascadable —
Max Configuration Frequency 10 MHz —
电源电压 3.3 V (typical) —
Programmability In-System Programmable via JTAG —
JTAG Interface IEEE Std 1149.1-1990 compliant —
Supported FPGA Families ACEX, APEX, Cyclone, FLEX, MAX 7000A/B, MAX II, Mercury ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000
Cascade Support Yes (nCASC pin) Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams
工作温度 -40C to +85C (industrial) -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet]
封装 20-PLCC (9x9 mm) 20-pin PLCC (J-lead, 9x9 mm)
安装类型 Surface Mount Surface Mount
Packaging Suffix -T = Tape and Reel —
RoHS 状态 Compliant Non-Compliant (original Altera Pb-containing part)
Lead-Free Yes —
Configuration Interface — Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE
Programming Interface — IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant
Supply Voltage VCC — 3.0 V to 3.6 V (3.3-V operation)
ISP Voltage Range — 5.0 V or 3.3 V
Lead-Free Version — EPC2LC20N available as lead-free equivalent
Programming Support — Altera Programming Unit (APU), Quartus II, JTAG programmer
Boundary-Scan — IEEE 1149.1 compliant, 8-bit or 16-bit JTAG

数据手册与资源

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