EPC2LC20-T vs EPC2LC20 Comparación
Comparación detallada lado a lado de EPC2LC20-T por Altera y EPC2LC20 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC2LC20-T | EPC2LC20 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Última compra | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,40 | $7,20 |
| Tipo de memoria | Configuration PROM (Flash) | Non-volatile configuration PROM |
| Tamaño de memoria | 1.6 Mb | 1.6 Mbit |
| Configuration Mode | Serial (PS mode), cascadable | — |
| Max Configuration Frequency | 10 MHz | — |
| Tensión de alimentación | 3.3 V (typical) | — |
| Programmability | In-System Programmable via JTAG | — |
| JTAG Interface | IEEE Std 1149.1-1990 compliant | — |
| Supported FPGA Families | ACEX, APEX, Cyclone, FLEX, MAX 7000A/B, MAX II, Mercury | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Cascade Support | Yes (nCASC pin) | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Temperatura de funcionamiento | -40C to +85C (industrial) | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Encapsulado | 20-PLCC (9x9 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Packaging Suffix | -T = Tape and Reel | — |
| Estado RoHS | Compliant | Non-Compliant (original Altera Pb-containing part) |
| Lead-Free | Yes | — |
| Configuration Interface | — | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Programming Interface | — | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | — | 5.0 V or 3.3 V |
| Lead-Free Version | — | EPC2LC20N available as lead-free equivalent |
| Programming Support | — | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | — | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |