EPC2LC20NU vs EPC2LC20 对比
详细并排对比 EPC2LC20NU 出自 Altera 和 EPC2LC20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPC2LC20NU | EPC2LC20 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | Memory ICs | Memory ICs |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $8.20 | $7.20 |
| 功能 | In-System Programmable Configuration PROM | — |
| Memory Density | 1.6 Mbit | — |
| FPGA Interface | Altera serial (4-pin: nCS, DCLK, DATA, nINIT_CONF) | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V | — |
| I/O Tolerance | 5 V tolerant inputs (per datasheet, except JTAG pins) | — |
| Programming Method | In-system via IEEE 1149.1 JTAG | — |
| JTAG Support | Yes (IEEE Std 1149.1 boundary-scan compliant) | — |
| Cascade Support | Yes - daisy-chain for larger bitstreams | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Minimum DC Input | -0.3 V (inputs may undershoot to -2.0 V for <20 ns) | — |
| Maximum Overshoot | 7.0 V for <100 mA and <20 ns | — |
| 封装 | 20-pin J-lead PLCC (9x9 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| 安装类型 | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Non-LEAD / non-RoHS (NU suffix = matte tin Sn finish, not Pb-free) | — |
| 工作温度 | 0C to +70C (commercial) | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Compatibility | Altera APEX 20K, APEX II, Mercury, FLEX 10K, ACEX 1K, Cyclone (legacy serial configuration) | — |
| 存储器类型 | — | Non-volatile configuration PROM |
| 存储容量 | — | 1.6 Mbit |
| Configuration Interface | — | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Programming Interface | — | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | — | 5.0 V or 3.3 V |
| Supported FPGA Families | — | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| RoHS 状态 | — | Non-Compliant (original Altera Pb-containing part) |
| Lead-Free Version | — | EPC2LC20N available as lead-free equivalent |
| Programming Support | — | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | — | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |