EPC2LC2QN vs EPC2LC20N 对比
详细并排对比 EPC2LC2QN 出自 Altera 和 EPC2LC20N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPC2LC2QN | EPC2LC20N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | Memory ICs | Memory ICs |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $15.20 | $7.40 |
| Product Type | FPGA Configuration Device | — |
| Configuration Memory Size | 2 Mb | — |
| Target Device Family | SRAM-Based LUT FPGAs (APEX II, Cyclone, Stratix) | — |
| Core Supply Voltage | 3.3 V | — |
| I/O Supply Voltage | 3.3 V | — |
| 工作温度 | 0°C to +70°C (Commercial) | [DATA_NEEDED: operating temperature range] |
| 封装 | 100-pin PQFP | 20-pin PLCC (J-Lead, 9x9 mm) |
| 安装类型 | Surface Mount | Surface Mount |
| Configuration Interface | 4-wire Serial (DATA, DCLK, nCONFIG, nSTATUS) | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Bitstream Compression | Supported (Altera-compressed format) | — |
| Multi-Device Daisy-Chain Support | Yes (up to 8 FPGAs) | — |
| In-System Programmability | Yes | — |
| Bitstream Programming Cycles | [DATA_NEEDED: minimum endurance cycles] | — |
| RoHS 状态 | Compliant | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | — |
| MSL 等级 | [DATA_NEEDED: MSL rating] | — |
| Country of Origin | [DATA_NEEDED: COO] | — |
| 功能 | — | In-System Programmable Configuration PROM for SRAM-based FPGAs |
| 存储容量 | — | 1.6 Mbit |
| 存储器类型 | — | Flash |
| Programmable Type | — | In System Programmable (ISP) |
| Supply Voltage VCCINT | — | 3.0 V to 3.6 V |
| Supply Voltage VCCIO | — | 4.75 V to 5.25 V |
| Configuration Clock Frequency | — | 8 MHz (max) |
| 接口 | — | Serial (DATA0, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| JTAG Support | — | IEEE 1149.1 / IEEE 1532 compliant |
| Packaging | — | Tube |
| Supported FPGA Families | — | Altera APEX, Cyclone, Stratix, ACEX, MAX 7000 |