EPC2LI20PULLS vs EPC2LI20 对比

详细并排对比 EPC2LI20PULLS 出自 Intel 和 EPC2LI20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2LI20PULLS EPC2LI20
品牌 Intel Altera
分类 Memory ICs Memory ICs
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $9.75 $5.95
存储器类型 Serial Configuration Flash PROM Flash (in-system programmable)
存储容量 1.6 Mbit 1.6 Mb (1,572,864 bits)
Configuration Interface Serial (Altera FPP / PS modes) Serial or Byte-wide (parallel)
最大时钟频率 10 MHz —
Supply Voltage (VCC) 3.0 V to 3.6 V (3.3 V typical) —
I/O Tolerance 5 V tolerant configuration pins —
Programmability In-system via IEEE 1149.1 JTAG —
Compression Support Yes (real-time decompression in target FPGA) —
Multi-Device Cascade Yes (daisy-chain supported) —
工作温度 -40C to +85C (industrial) -40 C to +85 C (Industrial)
封装 20-pin PLCC (J-Lead, 9x9 mm) —
安装类型 Surface Mount / Socket Surface Mount (PLCC socket-compatible)
MSL 等级 3 (168 hours) [DATA_NEEDED: MSL level]
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free finish] —
Compatible FPGA Families Cyclone, Stratix, APEX, ACEX, Mercury, Excalibur —
Programmable Type — In System Programmable (ISP)
功能 — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
封装 / 外壳 — 20-PLCC (J-lead, 9x9 mm)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)

数据手册与资源

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