EPC4QC100 vs EPC16QC-100T 对比

详细并排对比 EPC4QC100 出自 Altera 和 EPC16QC-100T 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC4QC100 EPC16QC-100T
品牌 Altera Altera
分类 Memory ICs Memory ICs
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $11.40 $14.50
功能 In-System Programmable Configuration PROM for FPGAs —
存储器类型 Flash Flash Configuration PROM (in-system programmable)
存储容量 4 Mb —
Supply Voltage (Core and I/O) 3.3 V —
Maximum Configuration Clock 66 MHz —
接口 Serial / Fast Passive (Altera FPGAs) —
In-System Programmability IEEE Std. 1532 compliant —
JTAG Support Yes (boundary scan + ISP via Jam STAPL) —
nINIT_CONF Pin Yes (triggers FPGA configuration via private JTAG instruction) —
封装 100-pin PQFP (20x14 mm) 100-pin PQFP (20 x 14 mm), 0.65 mm pitch
工作温度 0C to +70C (commercial) [DATA_NEEDED: Operating temperature range]
安装类型 Surface Mount Surface Mount
RoHS 状态 unknown unknown
Lead-Free unknown unknown
Compatible FPGA Families Stratix, Cyclone, APEX, Mercury, ACEX —
Memory Density — 16 Mbit (2 Mbyte)
Supported FPGA Families — Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K
Configuration Data Width — 8-bit or 16-bit (cascaded dual-device mode)
Configuration Modes — Serial (single device), Parallel (two cascaded devices)
Data Compression Support — Yes (35% to 55% bitstream reduction typical)
JTAG / Boundary Scan — IEEE 1149.1 compliant, in-system programmable
电源电压 — 3.3 V
Cascade Interface — nCE / nOE handshake for multi-device chains
Programming Interface — JTAG (IEEE 1149.1) and serial
Endurance — [DATA_NEEDED: Program/erase cycle rating]
Data Retention — [DATA_NEEDED: Data retention specification]
MSL 等级 — [DATA_NEEDED: Moisture sensitivity level]

数据手册与资源

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