EPF10K50RC240-3 vs EPF10K30RC240-3 对比

详细并排对比 EPF10K50RC240-3 出自 Altera 和 EPF10K30RC240-3 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPF10K50RC240-3 EPF10K30RC240-3
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $58.75 $95.00
Series FLEX 10K —
Family Flex 10K FLEX 10K
Logic Cells 2,880 —
Usable Gates (typical) 50,000 —
Total Gates (max) 116,000 (per family) —
Logic Array Blocks (LABs) 360 216
Embedded Array Blocks (EABs) 10 (per family) 6
User I/Os 189 —
Maximum Internal Frequency 125 MHz 125 MHz (speed grade -3)
Propagation Delay 0.6 ns (typical, per family) 0.6 ns typical
Supply Voltage (Core) 5 V —
Technology CMOS —
封装 240-RQFP (RQFP-240 with Exposed Pad) 240-RQFP / 240-BFQFP Exposed Pad
安装类型 Surface Mount Surface Mount
工作温度 0 C to +70 C (commercial) 0C to +70C (Commercial)
Configuration Method JTAG / EPC configuration device Serial / parallel PROM, JTAG
Programming Tool Support MAX+PLUS II / Quartus (legacy) —
MSL 等级 [DATA_NEEDED: MSL Level] —
RoHS 状态 [DATA_NEEDED: RoHS Status] Contains lead (non-RoHS)
Lead-Free [DATA_NEEDED: Lead-Free Status] —
Typical Gates — 30,000
Logic Elements (LEs) — 1,728
Total RAM Bits — 12,288
User I/O Pins — 189
Process Technology — 0.42 um CMOS, SRAM-based
Core Supply Voltage — 5.0 V (VCCINT)
I/O Supply Voltage — 3.3 V or 5.0 V (multiVolt I/O)
JTAG Support — Yes (IEEE 1149.1 boundary scan)

数据手册与资源

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