EPF10K50VRC240-4 vs EPF10K50VRC240-3N 对比

详细并排对比 EPF10K50VRC240-4 出自 Altera 和 EPF10K50VRC240-3N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPF10K50VRC240-4 EPF10K50VRC240-3N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $85.30 $58.75
Family FLEX-10K FLEX 10K (Altera / Intel)
Typical Gates 50,000 50,000
Logic Elements (LEs) 2,880 —
Logic Array Blocks (LABs) 360 360
Maximum User I/Os 189 —
Embedded Array Blocks (EABs) 10 (each up to 2,048 bits) —
封装 240-pin RQFP (RQFP-240) with exposed pad 240-RQFP (RQFP / Power QFP) with exposed pad
安装类型 Surface Mount Surface Mount
Core Voltage (VCCINT) 3.3 V —
I/O Voltage (VCCIO) 3.3 V or 5.0 V tolerant —
Speed Grade -4 -3
Internal Frequency (max) 125 MHz 125 MHz
Propagation Delay (per LE) 0.6 ns —
工作温度 0C to +70C (commercial) 0 °C to +70 °C (Commercial)
Configuration Method SRAM, serial/parallel via EPC2/EPC8 PROM SRAM, in-system programmable via JTAG / serial PROM
Programming Interface JTAG (IEEE 1149.1), ByteBlaster, BitBlaster —
RoHS 状态 Non-compliant (legacy SnPb lead frame) [DATA_NEEDED: confirm against manufacturer declaration]
Lead-Free No (commercial grade is SnPb; -N suffix is lead-free) —
Series — FLEX 10K
Logic Cells / Logic Elements — 2,880
Embedded Array Bits — 20,480 bits (EABs)
Maximum User I/O — 189
Core Voltage — 3.3 V
Propagation Delay — 0.6 ns (per digchip datasheet snippet)
Process Technology — 0.42 µm CMOS, SRAM-based

数据手册与资源

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