EPF10K70RC240-2 vs EPF10K70RC240-3N 对比

详细并排对比 EPF10K70RC240-2 出自 Intel 和 EPF10K70RC240-3N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPF10K70RC240-2 EPF10K70RC240-3N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $52.80 $95.00
Family FLEX 10K FLEX 10K
Logic Elements / Cells 3,744 —
Total Gates 70,000 (typical) —
Number of LABs/CLBs 468 —
Number of Flip-Flops 18,432 —
Embedded Array Blocks (EABs) 9 [DATA_NEEDED: exact EAB count]
Maximum User I/O 189 —
Number of I/O Banks [DATA_NEEDED: I/O bank count] —
工作电源电压 5 V —
Process Technology 0.42 µm CMOS 0.42 µm CMOS SRAM
Maximum Internal Frequency 125 MHz 125 MHz
Speed Grade -2 -3 (0.5 ns typical propagation delay)
工作温度 0°C to +70°C (commercial) Commercial (0C to +70C)
封装 240-BFQFP Exposed Pad (RQFP, gull-wing) 240-pin RQFP (BFQFP with exposed pad)
安装类型 Surface Mount Surface Mount
Programmability SRAM-based, in-system programmable —
Configuration Interface Serial configuration EPROM, JTAG (IEEE 1149.1) —
RoHS 状态 unknown [DATA_NEEDED: confirm RoHS - FLEX 10K predates RoHS directive]
Logic Elements (LEs) — 3,744
Equivalent Gates — 70,000
Total RAM Bits — 18,432
User I/Os — 189
Logic Array Blocks (LABs) — 468
Supply Voltage (VCCINT/VCCIO) — 5.0 V
Configuration Method — Passive serial / Passive parallel / JTAG
I/O Standards Supported — 5.0 V tolerant, 3.3 V, 2.5 V (MultiVolt)
JTAG Support — IEEE 1149.1 boundary-scan compliant
PCI Compliance — PCI SIG Local Bus Specification Revision 2.2
Lead-Free / Pb-Free Finish — Yes (N suffix)

数据手册与资源

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