EPF8820ARC208-4 vs EPF8820ARC208-2A 对比
详细并排对比 EPF8820ARC208-4 出自 Altera 和 EPF8820ARC208-2A 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPF8820ARC208-4 - FLEX 8000 FPGA, 8K Gates, 672 Cells, 208-RQFP | Altera
EPF8820ARC208-4 ⚠ 最后一次采购Altera
EPF8820ARC208-2A - FLEX 8000 FPGA, 672 Logic Elements, 152 I/O | Altera
EPF8820ARC208-2A Obsolete规格对比
| 参数 | EPF8820ARC208-4 | EPF8820ARC208-2A |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $25.40 | $14.10 |
| Device Family | FLEX 8000 | — |
| Series | FLEX 8000 | — |
| Usable Gates | 8,000 (up to 16,000 with utilization) | — |
| Logic Elements (Cells) | 672 | — |
| Number of Registers | 1,500 | — |
| Maximum User I/O | 152 | — |
| Supply Voltage (VCCINT/Logic Core) | 5 V nominal (4.75 V - 5.25 V) | — |
| 封装 / 外壳 | 208-BFQFP (RQFP) Exposed Pad | — |
| Package Dimensions | 28 mm x 28 mm | — |
| Supplier Device Package | 208-RQFP (28x28) | — |
| 安装类型 | Surface Mount | Surface Mount |
| Speed Grade | -4 | — |
| 工作温度 | 0 C to +70 C (commercial) [DATA_NEEDED: explicit -40/+85 grade info] | 0 °C to 70 °C (commercial) |
| Process Technology | CMOS, 0.5 um (5 V SRAM-based) | CMOS SRAM |
| Configuration Memory | SRAM (volatile - external configuration device required) | — |
| In-Circuit Reconfigurability | Yes (ICR via external configuration devices) | — |
| MSL 等级 | [DATA_NEEDED: MSL rating not in provided data] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status not in provided data] | [DATA_NEEDED: check distributor listing] |
| Family | — | FLEX 8000 |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Elements | — | 672 |
| Logic Array Blocks (LABs) | — | 84 |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count] |
| User I/O Pins | — | 152 |
| Dedicated Inputs | — | 4 |
| Total RAM Bits | — | [DATA_NEEDED: distributed RAM bits] |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 5.0 V selectable |
| Propagation Delay (tPD) | — | 5 ns (typical, -2A speed grade) |
| 封装 | — | 208-pin S-PQFP (Shrink Plastic Quad Flat Pack) with exposed pad |
| Terminal Pitch | — | 0.500 mm |
| Configuration Method | — | Serial SRAM, EPC1/EPC1064/EPC1213/EPC1441 PROM, or controller |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |