EPM1270F256C5 vs EPM1270F256I5 对比

详细并排对比 EPM1270F256C5 出自 Altera 和 EPM1270F256I5 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM1270F256C5 EPM1270F256I5
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $25.40 $16.90
Series MAX II EPM1270
Family EPM1270 —
Macro Cells 980 —
Logic Array Blocks (LABs) 16 —
Maximum User I/O Pins 212 —
Pin-to-Pin Logic Delay (tPD) 6.2 ns (C5 speed grade) —
Internal Operating Frequency 201.1 MHz —
Core Supply Voltage 2.5 V / 3.3 V —
I/O Standards Supported LVCMOS/LVTTL 1.8 V, 2.5 V, 3.3 V, 5.0 V (MultiVolt) —
Process Technology 0.18 µm 0.18 µm
Configuration Memory On-chip flash (non-volatile, instant-on) —
User Flash Memory 8 Kbits 8 Kbits
Programming Interface JTAG (IEEE 1149.1) / ISP via ByteBlaster / USB-Blaster JTAG (IEEE 1149.1) / ISP
封装 256-ball FineLine BGA (FBGA-256) 256-ball FBGA (FineLine BGA)
工作温度 0 °C to +85 °C (commercial, 'C' grade) -40 °C to +100 °C (industrial, "I")
RoHS 状态 Compliant [DATA_NEEDED: RoHS status]
Device Family — MAX II
Macrocell Count — 980
Logic Elements — 1270
User I/O Pins — 212 (max)
Pin/Package Count — 256
Supply Voltage (VCCINT) — 1.8 V
I/O Supply Voltage (VCCIO) — 2.5 V / 3.3 V
Maximum Internal Frequency — 201.1 MHz
Pin-to-Pin Delay (tPD) — 6.2 ns
Speed Grade — 5
安装类型 — Surface Mount

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