EPM1270F256I5N vs EPM1270F256I5 对比
详细并排对比 EPM1270F256I5N 出自 Intel 和 EPM1270F256I5 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM1270F256I5N | EPM1270F256I5 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $14.85 | $16.90 |
| Series | MAX II | EPM1270 |
| Family | MAX II (EPM1270) | — |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macro Cells | 980 | — |
| Logic Elements | 1270 | 1270 |
| User I/O Pins | 212 | 212 (max) |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Maximum Operating Frequency | 201.1 MHz | — |
| Pin-to-Pin Logic Delay | 6.2 ns (I5 speed grade) | — |
| External Supply Voltage | 2.5 V / 3.3 V | — |
| Internal Core Voltage | 1.8 V (on-chip regulator) | — |
| I/O Bank Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) + 3.3 V PCI-compliant bank | — |
| Process Technology | 0.18-micron Flash-based CMOS | 0.18 µm |
| Configuration Memory | Non-volatile Flash (instant-on) | — |
| Programming Interface | JTAG IEEE 1149.1 (boundary-scan + ISP) | JTAG (IEEE 1149.1) / ISP |
| 封装 | 256-ball FBGA (FineLine BGA), 17 x 17 mm | 256-ball FBGA (FineLine BGA) |
| 工作温度 | -40C to +100C (TJ), industrial | -40 °C to +100 °C (industrial, "I") |
| Speed Grade | I5 (industrial, 6.2 ns tPD) | 5 |
| 安装类型 | Surface Mount (SMT, BGA) | Surface Mount |
| RoHS 状态 | Compliant | [DATA_NEEDED: RoHS status] |
| 无卤 | Compliant (per GlobalSpec) | — |
| Country of Origin | Malaysia / Republic of Korea | — |
| Device Family | — | MAX II |
| Macrocell Count | — | 980 |
| Pin/Package Count | — | 256 |
| Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V |
| Maximum Internal Frequency | — | 201.1 MHz |
| Pin-to-Pin Delay (tPD) | — | 6.2 ns |