EPM240GF100C5N vs EPM240GM100C5N 对比
详细并排对比 EPM240GF100C5N 出自 Intel 和 EPM240GM100C5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N ✓ 量产中规格对比
| 参数 | EPM240GF100C5N | EPM240GM100C5N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $8.92 | $4.75 |
| Family | MAX II | MAX II G |
| Logic Elements / Macro Cells | 192 macro cells | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | — |
| Maximum Operating Frequency | 201.1 MHz | — |
| User I/Os | 80 | 80 |
| Logic Family | CMOS | — |
| Process Technology | 0.18 um | CMOS, Flash-based |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User Flash Memory | 8 Kbits | — |
| 封装 | 100-ball FBGA (11 x 11 mm, 1.0 mm pitch) | 100-MBGA (Micro FineLine BGA), 6 x 6 mm |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| 工作温度 | -40 C to +125 C | -40 C to +125 C |
| Programming Interface | JTAG (IEEE 1149.1) / Jam STAPL | JTAG (IEEE 1149.1) - ISP |
| Configuration Memory | On-chip non-volatile Flash | Non-volatile Flash |
| RoHS 状态 | Lead Free, RoHS compliant | — |
| Logic Elements | — | 240 (192 macrocells) |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| Ball Pitch | — | 0.5 mm |
| Supply Voltage - Core | — | 3.3 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) |
| Lead Free / RoHS | — | Yes / Compliant |
| MSL 等级 | — | 3 |