EPM240GM100C5N vs EPM240F100C5N 对比
详细并排对比 EPM240GM100C5N 出自 Altera 和 EPM240F100C5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N ✓ 量产中
规格对比
| 参数 | EPM240GM100C5N | EPM240F100C5N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $4.75 | $5.20 |
| Family | MAX II G | — |
| Logic Elements | 240 (192 macrocells) | — |
| User I/Os | 80 | — |
| Pin-to-Pin Delay (tPD) | 4.7 ns | — |
| 封装 | 100-MBGA (Micro FineLine BGA), 6 x 6 mm | 100-ball FineLine BGA (FBGA-100) |
| Ball Pitch | 0.5 mm | — |
| Supply Voltage - Core | 3.3 V | — |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) | — |
| Programming Interface | JTAG (IEEE 1149.1) - ISP | JTAG / ByteBlasterMV |
| Configuration Memory | Non-volatile Flash | Non-volatile flash (instant-on) |
| 工作温度 | -40 C to +125 C | — |
| Lead Free / RoHS | Yes / Compliant | — |
| MSL 等级 | 3 | — |
| 安装类型 | Surface Mount (BGA) | Surface Mount (BGA) |
| Process Technology | CMOS, Flash-based | — |
| Device Family | — | MAX II |
| Logic Elements (LEs) | — | 240 |
| Macrocells | — | 192 |
| User I/O Pins (maximum) | — | 80 |
| Pin-to-Pin Logic Delay (tPD) | — | 4.7 ns |
| Maximum Operating Frequency | — | [DATA_NEEDED: fmax per datasheet] |
| Global Clock Networks | — | [DATA_NEEDED: count] |
| 工作温度范围 | — | 0C to +85C (commercial) |
| Supply Voltage Core (VCCINT) | — | 3.3 V |
| I/O Bank Voltage (VCCIO) | — | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| RoHS 状态 | — | Compliant |