EPM240GM100C5N vs EPM240F100C5N Comparison
Detailed side-by-side comparison of EPM240GM100C5N by Altera and EPM240F100C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N β Active
Specification Comparison
| Parameter | EPM240GM100C5N | EPM240F100C5N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.75 | $5.20 |
| Family | MAX II G | β |
| Logic Elements | 240 (192 macrocells) | β |
| User I/Os | 80 | β |
| Pin-to-Pin Delay (tPD) | 4.7 ns | β |
| Package | 100-MBGA (Micro FineLine BGA), 6 x 6 mm | 100-ball FineLine BGA (FBGA-100) |
| Ball Pitch | 0.5 mm | β |
| Supply Voltage - Core | 3.3 V | β |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) | β |
| Programming Interface | JTAG (IEEE 1149.1) - ISP | JTAG / ByteBlasterMV |
| Configuration Memory | Non-volatile Flash | Non-volatile flash (instant-on) |
| Operating Temperature | -40 C to +125 C | β |
| Lead Free / RoHS | Yes / Compliant | β |
| MSL Level | 3 | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| Process Technology | CMOS, Flash-based | β |
| Device Family | β | MAX II |
| Logic Elements (LEs) | β | 240 |
| Macrocells | β | 192 |
| User I/O Pins (maximum) | β | 80 |
| Pin-to-Pin Logic Delay (tPD) | β | 4.7 ns |
| Maximum Operating Frequency | β | [DATA_NEEDED: fmax per datasheet] |
| Global Clock Networks | β | [DATA_NEEDED: count] |
| Operating Temperature Range | β | 0C to +85C (commercial) |
| Supply Voltage Core (VCCINT) | β | 3.3 V |
| I/O Bank Voltage (VCCIO) | β | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) |
| JTAG Support | β | IEEE 1149.1 boundary-scan |
| RoHS Status | β | Compliant |