EPM240M100I5N vs EPM240GM100C5N 对比
详细并排对比 EPM240M100I5N 出自 Altera 和 EPM240GM100C5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N ✓ 量产中规格对比
| 参数 | EPM240M100I5N | EPM240GM100C5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $7.95 | $4.75 |
| Series | MAX II | — |
| Family | MAX II CPLD | MAX II G |
| Macro Cells | 192 | — |
| Logic Elements | 240 | 240 (192 macrocells) |
| Maximum Internal Frequency | 201.1 MHz | — |
| Propagation Delay (tPD) | 4.7 ns | — |
| On-die Non-volatile Memory | 8 Kbits | — |
| Process Technology | 0.18 µm, 6-layer metal flash | CMOS, Flash-based |
| Core Voltage | 2.5 V / 3.3 V | — |
| I/O Bank Voltages | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User I/O Pins | [DATA_NEEDED: user IO count for MBGA package] | — |
| 封装 | 100-MBGA (Micro FineLine BGA) | 100-MBGA (Micro FineLine BGA), 6 x 6 mm |
| 工作温度 | -40 °C to +100 °C (industrial) | -40 C to +125 C |
| Programming Interface | JTAG (IEEE 1149.1) | JTAG (IEEE 1149.1) - ISP |
| RoHS 状态 | Compliant | — |
| Lead-Free | Yes | — |
| 安装类型 | Surface Mount (BGA) | Surface Mount (BGA) |
| User I/Os | — | 80 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| Ball Pitch | — | 0.5 mm |
| Supply Voltage - Core | — | 3.3 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) |
| Configuration Memory | — | Non-volatile Flash |
| Lead Free / RoHS | — | Yes / Compliant |
| MSL 等级 | — | 3 |