EPM240T100I5N vs EPM240T100A5N 对比
详细并排对比 EPM240T100I5N 出自 Intel 和 EPM240T100A5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM240T100I5N | EPM240T100A5N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $4.68 | $7.05 |
| Series | MAX II | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements (LE) | 240 | 240 |
| Macrocells | 192 | — |
| User I/O Pins | 80 | — |
| On-chip User Flash Memory (UFM) | 8 Kbits | — |
| Process Technology | 0.18 µm, 6-layer-metal flash | 0.18 µm |
| 封装 | TQFP-100 | 100-pin TQFP (14 x 14 x 1.0 mm) |
| 安装类型 | Surface Mount | Surface Mount |
| Core Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V nominal) | — |
| I/O Bank Supply (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Typical Propagation Delay (tPD) | 7 ns (approx., I5 speed grade) | — |
| 工作温度范围 | -40 °C to +100 °C (industrial, I-temp) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / ISP |
| RoHS 状态 | Compliant | Compliant (Pb-free) |
| Configuration Storage | Non-volatile flash (instant-on, no external PROM) | — |
| Family | — | MAX II |
| Macro Cells | — | 192 |
| User I/O Count | — | 80 |
| Pin-to-Pin Logic Delay (tPD) | — | 4.7 ns |
| Maximum Internal Frequency | — | 201.1 MHz |
| 电源电压 | — | 2.5 V / 3.3 V |
| I/O Bank Count | — | 4 (multi-voltage) |
| Configuration Memory | — | On-chip Flash (instant-on) |
| 工作温度 | — | 0C to +85C (commercial, "A5N" suffix) |