EPM3064ATC100-7N vs EPM3064ATC100-10NA 对比
详细并排对比 EPM3064ATC100-7N 出自 Altera 和 EPM3064ATC100-10NA 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM3064ATC100-10NA - MAX 3000A CPLD, 64 Macrocells, 10ns, TQFP-100 | Intel (Altera)
EPM3064ATC100-10NA ✓ 量产中规格对比
| 参数 | EPM3064ATC100-7N | EPM3064ATC100-10NA |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $6.10 | $4.65 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (Complex Programmable Logic Device) |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 2 | 4 |
| User I/O Pins | 66 | — |
| Usable Gates | up to 1,250 | 1,250 |
| Propagation Delay (tPD) | 7.5 ns (pin-to-pin, -7 speed grade) | — |
| Maximum Internal Frequency | 166.7 MHz (-7 speed grade) | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| Program Memory Technology | EEPROM (non-volatile) | — |
| In-System Programming | IEEE Std. 1149.1 (JTAG), IEEE Std. 1532 | IEEE Std. 1532 compliant |
| 封装 | TQFP-100 | TQFP-100 (0.5 mm pitch) |
| 安装类型 | Surface Mount | — |
| 工作温度 | 0 °C to +70 °C (commercial) | 0C to +70C (commercial) |
| RoHS 状态 | [DATA_NEEDED: confirmed RoHS status from manufacturer page] | — |
| User I/Os | — | 66 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Operating Frequency | — | [DATA_NEEDED: fMAX in MHz] |
| Supply Voltage (VCCINT) | — | 3.3 V |
| MultiVolt I/O Voltages | — | 2.5 V / 3.3 V / 5.0 V |
| Configuration Memory | — | Non-volatile EEPROM |
| Boundary-Scan Test | — | IEEE Std. 1149.1 (JTAG) |
| Lead-Free / RoHS | — | Yes (NA suffix) |