EPM3064ATC44-10N vs EPM3064ATC44-4N 对比

详细并排对比 EPM3064ATC44-10N 出自 Altera 和 EPM3064ATC44-4N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM3064ATC44-10N EPM3064ATC44-10N - 64-Macro Cell MAX 3000A CPLD | Altera

EPM3064ATC44-10N - 64-Macro Cell MAX 3000A CPLD | Altera

EPM3064ATC44-10N ✓ 量产中

规格对比

参数 EPM3064ATC44-10N EPM3064ATC44-4N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 不推荐新设计
库存状态 有库存 有库存
单价(USD) $5.10 $3.45
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 1250 1,250
Macro Cells 64 64
User I/O Pins 34 —
Logic Array Blocks (LABs) 4 —
Pin-to-Pin Delay (tPD) 10 ns —
Maximum Counter Frequency 192.3 MHz 222.2 MHz
Supply Voltage (VCCINT) 3.3 V 3.3 V
I/O Standard MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) —
Configuration Memory EEPROM (non-volatile) —
In-System Programming IEEE Std. 1532 compliant —
Boundary-Scan Test IEEE Std. 1149.1 (JTAG) compliant —
封装 TQFP-44 (10x10 mm) 44-pin TQFP
安装类型 Surface Mount Surface Mount
工作温度 0C to +70C (commercial) 0C to +70C (commercial)
RoHS 状态 Compliant [DATA_NEEDED: rohs status]
Pin-Locking Yes (across design iterations) —
Logic Array Blocks — 2
Number of I/Os — 34
Dedicated Inputs — 4
Propagation Delay (tpd) — 4.5 ns
I/O Supply Voltage (VCCIO) — 2.5 V or 3.3 V
Programmability — EEPROM, in-system programmable (JTAG)
JTAG Support — IEEE Std. 1149.1 (boundary-scan) and IEEE Std. 1532 (ISP)

数据手册与资源

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