EPM3064ATC44-10NAF vs EPM3064ATI44-10NAE 对比
详细并排对比 EPM3064ATC44-10NAF 出自 Altera 和 EPM3064ATI44-10NAE 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM3064ATC44-10NAF - 64-Macrocell MAX 3000A CPLD, 10ns TQFP-44 | Intel
EPM3064ATC44-10NAF Nrnd规格对比
| 参数 | EPM3064ATC44-10NAF | EPM3064ATI44-10NAE |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $5.05 | $3.05 |
| Series | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 64 | — |
| Logic Elements / LABs | 4 LABs (16 macrocells per LAB) | — |
| Usable Gates | 1250 | 1250 |
| Number of I/O Pins | 34 | — |
| Propagation Delay (tPD, max) | 10 ns | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Voltage Tolerance | Multi-voltage (3.3 V / 2.5 V / 1.8 V capable) | — |
| Programmable Technology | EEPROM (non-volatile) | CMOS EEPROM |
| In-System Programmable | Yes (IEEE Std. 1532 compliant) | Yes (JTAG, IEEE 1149.1) |
| Boundary-Scan Test | Yes (IEEE Std. 1149.1 JTAG) | — |
| Pin-Locking | Yes | — |
| 封装 | TQFP-44 (10x10 mm) | 44-pin TQFP |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | [DATA_NEEDED: industrial/commercial grade] | -40 °C to +85 °C (industrial) |
| Lead Finish | Lead-free (NiPdAu, AF suffix) | — |
| RoHS 状态 | Compliant | — |
| Configuration Memory Cycles | 100 erase/program cycles | — |
| Family | — | MAX 3000A |
| Device Family | — | EPM3064A |
| Macrocells | — | 64 |
| User I/O Pins | — | 34 |
| Logic Elements (LABs) | — | 4 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: maximum internal frequency MHz] |
| Supply Voltage VCCINT | — | 3.0 V to 3.6 V |
| I/O Supply Voltage VCCIO | — | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Lead-Free / RoHS | — | Yes (AE suffix) |
| 生命周期状态 | — | Active (MAX 3000A legacy family) |