EPM3064ATC44-10NAF vs EPM3064ATI44-10NAE 비교
다음의 상세 나란히 비교: EPM3064ATC44-10NAF 제조: Altera 및 EPM3064ATI44-10NAE 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM3064ATC44-10NAF - 64-Macrocell MAX 3000A CPLD, 10ns TQFP-44 | Intel
EPM3064ATC44-10NAF Nrnd사양 비교
| 파라미터 | EPM3064ATC44-10NAF | EPM3064ATI44-10NAE |
|---|---|---|
| 브랜드 | Altera | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $5.05 | $3.05 |
| Series | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 64 | — |
| Logic Elements / LABs | 4 LABs (16 macrocells per LAB) | — |
| Usable Gates | 1250 | 1250 |
| Number of I/O Pins | 34 | — |
| Propagation Delay (tPD, max) | 10 ns | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Voltage Tolerance | Multi-voltage (3.3 V / 2.5 V / 1.8 V capable) | — |
| Programmable Technology | EEPROM (non-volatile) | CMOS EEPROM |
| In-System Programmable | Yes (IEEE Std. 1532 compliant) | Yes (JTAG, IEEE 1149.1) |
| Boundary-Scan Test | Yes (IEEE Std. 1149.1 JTAG) | — |
| Pin-Locking | Yes | — |
| 패키지 | TQFP-44 (10x10 mm) | 44-pin TQFP |
| 실장 유형 | Surface Mount | Surface Mount |
| 동작 온도 | [DATA_NEEDED: industrial/commercial grade] | -40 °C to +85 °C (industrial) |
| Lead Finish | Lead-free (NiPdAu, AF suffix) | — |
| RoHS 상태 | Compliant | — |
| Configuration Memory Cycles | 100 erase/program cycles | — |
| Family | — | MAX 3000A |
| Device Family | — | EPM3064A |
| Macrocells | — | 64 |
| User I/O Pins | — | 34 |
| Logic Elements (LABs) | — | 4 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: maximum internal frequency MHz] |
| Supply Voltage VCCINT | — | 3.0 V to 3.6 V |
| I/O Supply Voltage VCCIO | — | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Lead-Free / RoHS | — | Yes (AE suffix) |
| 수명 주기 상태 | — | Active (MAX 3000A legacy family) |