EPM3064ATC44-4N vs EPM3064ATC44-7N 对比
详细并排对比 EPM3064ATC44-4N 出自 Altera 和 EPM3064ATC44-7N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3064ATC44-4N | EPM3064ATC44-7N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $3.45 | $2.30 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 64 | 64 |
| Logic Array Blocks | 2 | 2 |
| Number of I/Os | 34 | — |
| Dedicated Inputs | 4 | — |
| Usable Gates | 1,250 | 1,250 |
| Propagation Delay (tpd) | 4.5 ns | — |
| Maximum Counter Frequency | 222.2 MHz | 192.3 MHz (-7 grade) |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V or 3.3 V | — |
| Programmability | EEPROM, in-system programmable (JTAG) | EEPROM, in-system programmable (ISP) |
| JTAG Support | IEEE Std. 1149.1 (boundary-scan) and IEEE Std. 1532 (ISP) | — |
| 工作温度 | 0C to +70C (commercial) | 0°C to +85°C (commercial) |
| 封装 | 44-pin TQFP | 44-pin TQFP |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | [DATA_NEEDED: rohs status] | Compliant |
| User I/O Pins | — | 34 |
| 引脚数 | — | 44 |
| Speed Grade | — | -7 (7.5 ns pin-to-pin delay) |
| Pin-to-Pin Delay (tPD) | — | 7.5 ns |
| Supply Voltage (VCC) | — | 3.3 V |
| MultiVolt I/O | — | 1.8 V / 2.5 V / 3.3 V |
| JTAG Interface | — | IEEE Std. 1149.1 compliant |
| ISP Standard | — | IEEE Std. 1532 compliant |
| Boundary-Scan Test (BST) | — | Built-in, JTAG-driven |