EPM3064ATI44-10N vs EPM3064ATI44-10NAD 对比
详细并排对比 EPM3064ATI44-10N 出自 Altera 和 EPM3064ATI44-10NAD 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM3064ATI44-10NAD - MAX 3000A 64-Macrocell CPLD 44-TQFP | Altera
EPM3064ATI44-10NAD Obsolete规格对比
| 参数 | EPM3064ATI44-10N | EPM3064ATI44-10NAD |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $3.95 | $4.10 |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 64 | 64 |
| Usable Gates | 1250 | 1,250 |
| User I/Os | 34 | — |
| Dedicated Inputs | 4 | — |
| Logic Blocks | 4 | — |
| Pin-to-Pin Delay | 10 ns (-10 speed grade) | — |
| Maximum Frequency (fMAX) | 100 MHz | — |
| Programmable Type | In-System Programmable (EEPROM) | — |
| ISP Interface | IEEE Std. 1149.1 (JTAG) | — |
| ISP Standard Compliance | IEEE Std. 1532 | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V (MultiVolt) | — |
| 工作温度 | -40C to +85C (Industrial, "N" suffix) | -40C to +85C (Industrial) |
| 封装 | 44-pin TQFP | TQFP-44 |
| Process Technology | CMOS EEPROM | — |
| Boundary-Scan Test | Built-in (JTAG) | — |
| 安装类型 | Surface Mount | Surface Mount |
| Lead-Free Status | Contains Lead (per digchip datasheet excerpt) | — |
| RoHS 状态 | Non-Compliant (per digchip datasheet excerpt) | Compliant |
| Logic Array Blocks (LABs) | — | 4 (16 macrocells each) |
| User I/Os (max) | — | 34 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Setup Time (tSU) | — | 4.5 ns |
| Core Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| Programming Interface | — | JTAG (IEEE Std. 1532 compliant) |
| In-System Programmable | — | Yes |