EPM3128ATC144-10N vs EPM3128ATI144-5N 对比

详细并排对比 EPM3128ATC144-10N 出自 Intel 和 EPM3128ATI144-5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3128ATC144-10N EPM3128ATI144-5N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 不推荐新设计
库存状态 有库存 有库存
单价(USD) $6.56 $10.50
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 128 128
Usable Gates 2,500 (up to 10,000 for full family) —
Logic Array Blocks (LABs) 8 —
User I/Os 96 96
Propagation Delay (tPD) 10 ns (speed grade -10) —
Counter Frequency (fCNT) 98 MHz —
Supply Voltage (VCCINT/VCCIO) 3.3 V —
MultiVolt I/O Support 3.3 V / 2.5 V / 1.8 V —
Configuration Memory EEPROM (in-system programmable, non-volatile) Non-volatile on-chip EEPROM
封装 144-pin TQFP TQFP-144 (20x20 mm, 0.5 mm pitch)
安装类型 Surface Mount Surface Mount
工作温度 0 °C to +70 °C (commercial) -40C to +85C (industrial)
JTAG (IEEE 1149.1) Yes (BST + pin-locking) —
ISP (IEEE 1532) Yes —
Logic Gates — 2,500 gates
Maximum Operating Frequency — 192.3 MHz
Pin-to-Pin Propagation Delay (tPD) — 5.0 ns
Supply Voltage (VCCINT) — 3.0 V to 3.6 V (3.3 V nominal)
I/O Standard — LVCMOS / LVTTL (5.0 V tolerant inputs)
Programming Interface — JTAG (IEEE 1149.1 BST) - in-system
Process Technology — 0.30 um CMOS EEPROM
MSL 等级 — 3 (168 hours)
RoHS 状态 — [DATA_NEEDED: RoHS status]
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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