EPM3128ATC144-10N vs EPM3256ATC144-10N 对比

详细并排对比 EPM3128ATC144-10N 出自 Intel 和 EPM3256ATC144-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM3256ATC144-10N EPM3256ATC144-10N - 256-Macro CPLD, 10ns, 144-TQFP | Altera

EPM3256ATC144-10N - 256-Macro CPLD, 10ns, 144-TQFP | Altera

EPM3256ATC144-10N ⚠ 最后一次采购

规格对比

参数 EPM3128ATC144-10N EPM3256ATC144-10N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 最后采购期
库存状态 有库存 有库存
单价(USD) $6.56 $14.50
Family MAX 3000A —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 128 256
Usable Gates 2,500 (up to 10,000 for full family) 5,000 (up to 10,000 usable in family)
Logic Array Blocks (LABs) 8 —
User I/Os 96 —
Propagation Delay (tPD) 10 ns (speed grade -10) 10 ns
Counter Frequency (fCNT) 98 MHz —
Supply Voltage (VCCINT/VCCIO) 3.3 V —
MultiVolt I/O Support 3.3 V / 2.5 V / 1.8 V —
Configuration Memory EEPROM (in-system programmable, non-volatile) —
封装 144-pin TQFP 144-LQFP (TQFP, ATC suffix)
安装类型 Surface Mount Surface Mount
工作温度 0 °C to +70 °C (commercial) 0C to +70C (commercial) [DATA_NEEDED: exact operating-temp grade letter for -10N suffix]
JTAG (IEEE 1149.1) Yes (BST + pin-locking) —
ISP (IEEE 1532) Yes —
Series — MAX 3000A
Number of I/Os — 116
Number of Logic Elements / Blocks — 16 LABs
Supply Voltage (VCCINT) — 3.3 V
Maximum Counter Frequency — 227.3 MHz
Global Clocks — 3
Global Clear / OE — Yes (1 global clear, 1 global OE)
Program Memory Type — EEPROM (non-volatile, in-system programmable)
JTAG Support — IEEE Std. 1149.1 with pin-locking
ISP Compliance — IEEE Std. 1532
Boundary-Scan Test (BST) — Built-in, IEEE 1149.1 compliant
RoHS 状态 — [DATA_NEEDED: RoHS compliance - not explicitly confirmed in verified data]
Lead-Free / Halogen-Free — [DATA_NEEDED: not explicitly confirmed in verified data]

数据手册与资源

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