EPM3128ATI10010N vs EPM3128ATC100-10N 对比

详细并排对比 EPM3128ATI10010N 出自 Altera 和 EPM3128ATC100-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM3128ATI10010N EPM3128ATI10010N - MAX 3000A CPLD 128MC 100TQFP | Altera

EPM3128ATI10010N - MAX 3000A CPLD 128MC 100TQFP | Altera

EPM3128ATI10010N ✓ 量产中

规格对比

参数 EPM3128ATI10010N EPM3128ATC100-10N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 不推荐新设计
库存状态 有库存 有库存
单价(USD) $9.10 $5.20
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 128 128
Logic Array Blocks (LABs) 8 —
Usable Gates 2,500 2500
User I/Os 80 —
引脚数 100 —
封装 100-pin TQFP 100-pin TQFP (14 x 14 x 1.0 mm)
安装类型 Surface Mount Surface Mount
Propagation Delay (tPD) 10 ns 10 ns
Maximum Internal Frequency 98 MHz —
Core Supply Voltage 3.0 V to 3.6 V —
I/O Bank Voltage 1.8 V / 2.5 V / 3.3 V —
工作温度 0 C to +70 C (commercial) 0 °C to +70 °C (commercial)
Process Technology CMOS EEPROM —
Programming Interface JTAG (IEEE 1149.1) ISP —
PCI Compliance Yes (speed grades -5/-6/-7/-10) —
RoHS 状态 unknown Compliant
Product Type — CPLD (Complex Programmable Logic Device)
Number of I/O — 80
Logic Elements / Blocks — 8 LABs (16 macrocells each)
Maximum Internal Frequency (fMAX) — 98 MHz
Supply Voltage VCCINT — 3.3 V
I/O Bank Voltage VCCIO — 3.3 V or 2.5 V (selectable)
Configuration Memory — CMOS EEPROM (non-volatile, instant-on)
In-System Programming — IEEE Std. 1532-compliant ISP via JTAG
Lead-Free — Yes
MSL 等级 — 3 (per JEDEC J-STD-020)

数据手册与资源

浏览全部产品 创建 BOM 获取报价