EPM3128ATI144-10 vs EPM3128ATI144-5N 对比

详细并排对比 EPM3128ATI144-10 出自 Altera 和 EPM3128ATI144-5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3128ATI144-10 EPM3128ATI144-5N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $10.85 $10.50
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Usable Gates 2,500 —
Macro Cells 128 128
Logic Array Blocks (LABs) 8 —
User I/Os 98 96
引脚数量 144 —
封装 TQFP-144 (FINE LINE) TQFP-144 (20x20 mm, 0.5 mm pitch)
Supply Voltage (VCCINT) 3.3 V 3.0 V to 3.6 V (3.3 V nominal)
Pin-to-Pin Delay 10 ns (speed grade -10) —
Counter Frequency 98 MHz typical —
Logic Family CMOS, EEPROM-based —
Programming Interface IEEE 1149.1 JTAG (ISP) JTAG (IEEE 1149.1 BST) - in-system
PCI Compliance PCI Local Bus Spec Rev 2.2 (speed grades -4 to -10) —
工作温度 -40C to +85C (Industrial) -40C to +85C (industrial)
安装类型 Surface Mount (Gull-Wing TQFP) Surface Mount
RoHS 状态 Compliant (lead-free TQFP) [DATA_NEEDED: RoHS status]
Logic Gates — 2,500 gates
Maximum Operating Frequency — 192.3 MHz
Pin-to-Pin Propagation Delay (tPD) — 5.0 ns
I/O Standard — LVCMOS / LVTTL (5.0 V tolerant inputs)
Process Technology — 0.30 um CMOS EEPROM
Configuration Memory — Non-volatile on-chip EEPROM
MSL 等级 — 3 (168 hours)
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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