EPM3128ATI144-5N vs EPM3128ATC144-7N 对比

详细并排对比 EPM3128ATI144-5N 出自 Altera 和 EPM3128ATC144-7N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3128ATI144-5N EPM3128ATC144-7N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 有效
库存状态 有库存 有库存
单价(USD) $10.50 $9.25
Family MAX 3000A —
Logic Gates 2,500 gates —
Macro Cells 128 —
User I/Os 96 96
Maximum Operating Frequency 192.3 MHz —
Pin-to-Pin Propagation Delay (tPD) 5.0 ns —
Supply Voltage (VCCINT) 3.0 V to 3.6 V (3.3 V nominal) —
I/O Standard LVCMOS / LVTTL (5.0 V tolerant inputs) —
Programming Interface JTAG (IEEE 1149.1 BST) - in-system —
Process Technology 0.30 um CMOS EEPROM —
Configuration Memory Non-volatile on-chip EEPROM —
封装 TQFP-144 (20x20 mm, 0.5 mm pitch) TQFP-144 (20 x 20 mm, 0.5 mm pitch)
安装类型 Surface Mount Surface Mount (SMD/SMT)
工作温度 -40C to +85C (industrial) 0 °C to +70 °C (commercial)
MSL 等级 3 (168 hours) —
RoHS 状态 [DATA_NEEDED: RoHS status] Lead-free (-7N suffix indicates Pb-free finish)
Lead-Free [DATA_NEEDED: lead-free status] —
Series — MAX 3000A
Device Type — CPLD (Complex Programmable Logic Device)
Architecture — EEPROM-based, MAX architecture
Number of Macrocells — 128
Number of Usable Gates — Up to 10,000
引脚数量 — 144
Logic Family — CMOS
Propagation Delay (tPD) — 7.5 ns (pin-to-pin, -7 speed grade)
Counter Frequency — Up to 227.3 MHz
Core Supply Voltage (VCCINT) — 3.3 V
I/O Supply Voltage (VCCIO) — 2.5 V / 3.3 V / 5.0 V (MultiVolt)
In-System Programmability (ISP) — Yes, via JTAG (IEEE 1149.1)
PCI Compliance — Compatible with PCI Local Bus Specification Rev. 2.2

数据手册与资源

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