EPM3128ATI144-7N vs EPM3128ATC144-5N 对比
详细并排对比 EPM3128ATI144-7N 出自 Altera 和 EPM3128ATC144-5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM3128ATI144-7N - 128 Macrocell CPLD, 129.9MHz, 3.3V | Altera MAX 3000A
EPM3128ATI144-7N ⚠ 最后一次采购规格对比
| 参数 | EPM3128ATI144-7N | EPM3128ATC144-5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.95 | $13.75 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Logic Capacity | 2.5K gates | — |
| Macrocells | 128 | 128 |
| Maximum Frequency (fMAX) | 129.9 MHz | — |
| Pin-to-Pin Propagation Delay | 7.5 ns (speed grade -7) | — |
| User I/O Pins | 96 | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V / 2.5 V / 1.8 V | — |
| Programmable Logic Technology | CMOS EEPROM | — |
| Programming Interface | JTAG (IEEE Std 1149.1) in-system programmable | — |
| 封装 | 144-pin TQFP | 144-pin TQFP (20x20 mm) |
| Terminal Pitch | 0.5 mm | — |
| JEDEC Package Code | S-PQFP-G144 | — |
| 工作温度 | -40C to +85C (industrial) | 0C to 70C (Commercial) |
| MultiVolt I/O | Yes (interfaces with 5.0V/3.3V/2.5V/1.8V logic) | — |
| Logic Family | — | CMOS |
| Usable Gates | — | 2500 |
| User I/O | — | 96 |
| Pin-to-Pin Logic Delay | — | 5 ns |
| Counter Frequency | — | up to 227.3 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Logic Levels Supported | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| In-System Programmability | — | Yes (3.3-V via JTAG) |
| JTAG Boundary Scan | — | IEEE Std 1149.1 compliant |
| RoHS 状态 | — | Compliant (lead-free) |
| 安装类型 | — | Surface Mount |