EPM3256AFC256-7 vs EPM3128AFI256-10N 对比

详细并排对比 EPM3256AFC256-7 出自 Altera 和 EPM3128AFI256-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3256AFC256-7 EPM3128AFI256-10N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $12.10 $9.75
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 256 128
Logic Array Blocks (LABs) 16 —
Usable Gates 10,000 —
User I/Os 161 98
Pin-to-Pin Logic Delay 4.5 ns (max) —
Counter Frequency 227.3 MHz (max) —
Propagation Delay (tpd) 10 ns —
Core Voltage 3.3 V —
I/O Compatibility 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O) 5.0 V, 3.3 V, 2.5 V (MultiVolt)
Process Technology CMOS EEPROM, 0.30 µm —
In-System Programmability IEEE Std. 1532-compliant 3.3-V ISP Yes (JTAG / IEEE 1149.1)
Boundary-Scan Test JTAG (IEEE 1149.1) —
封装 FBGA-256 (FineLine BGA), 256 balls 256-ball FineLine BGA (FBGA-256)
工作温度 0 °C to 70 °C (Commercial) -40C to +85C (industrial, per 'I' suffix)
Speed Grade -7 -10 (10 ns pin-to-pin)
RoHS 状态 [DATA_NEEDED: RoHS compliance status] Compliant
Logic Density — 2.5K gates
Propagation Delay (tPD) — 10 ns
Counter Frequency (max) — 227.3 MHz
Logic Family — CMOS, EEPROM-based
Supply Voltage (Core) — 3.3 V
引脚数量 — 256
Configuration Memory — EEPROM (non-volatile)
PCI Compliance — PCI Local Bus Spec Rev 2.2

数据手册与资源

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