EPM3256AFI256-10 vs EPM3512AFC256C 对比

详细并排对比 EPM3256AFI256-10 出自 Intel 和 EPM3512AFC256C 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EPM3256AFI256-10 EPM3256AFI256-10 - 256-Macrocell CPLD, 10ns, FBGA-256 | Intel

EPM3256AFI256-10 - 256-Macrocell CPLD, 10ns, FBGA-256 | Intel

EPM3256AFI256-10 ⚠ 最后一次采购
Intel
EPM3512AFC256C EPM3512AFC256C - MAX 3000A CPLD, 512 Macrocells, 208 I/O | Altera

EPM3512AFC256C - MAX 3000A CPLD, 512 Macrocells, 208 I/O | Altera

EPM3512AFC256C ⚠ 最后一次采购

规格对比

参数 EPM3256AFI256-10 EPM3512AFC256C
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 最后采购期
库存状态 有库存 有库存
单价(USD) $12.40 $27.95
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 256 512
User I/Os 161 —
Logic Elements / LABs 16 Logic Elements per LAB —
Propagation Delay (tPD) 10 ns —
Supply Voltage - Core 3.3 V —
I/O Voltage Support 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O) —
Programmability In-System Programmable (ISP) via IEEE 1149.1 JTAG —
Process Technology CMOS EEPROM —
Package Type FBGA-256 (FineLine BGA) —
工作温度 -40C to +85C (Industrial) 0C to +70C (Commercial)
安装类型 Surface Mount (BGA) Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance status]
Speed Grade -10 (10 ns pin-to-pin) C (per datasheet ordering code)
Logic Array Blocks (LABs) — 16
Maximum User I/Os — 208
Dedicated Input Pins — 12
封装 — 256-ball FineLine BGA (FC)
Configuration Technology — EEPROM (non-volatile, instant-on)
Core Voltage — 3.3 V
I/O Standards Supported — MultiVolt: 5.0 V, 3.3 V, 2.5 V
JTAG Support — IEEE 1149.1 Boundary Scan
PCI Compliance — PCI SIG Local Bus Specification Revision 2.2
Programming — In-system programmable via JTAG

数据手册与资源

浏览全部产品 创建 BOM 获取报价