EPM3256AQC208-10 vs EPM3256AQC208-7N 对比

详细并排对比 EPM3256AQC208-10 出自 Altera 和 EPM3256AQC208-7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3256AQC208-10 EPM3256AQC208-7N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $15.20 $19.95
Family MAX 3000A MAX 3000A
Logic Family CMOS (EEPROM-based) —
Macrocells 256 —
Usable Gates 5,000 —
User I/Os 161 161
引脚数 208 —
封装 208-BFQFP (PQFP, Gull Wing) 208-pin PQFP
Pin-to-Pin Propagation Delay 10 ns —
Counter Frequency (max) 227.3 MHz —
Supply Voltage (VCCINT) 3.3 V —
I/O Tolerance MultiVolt 2.5 V / 3.3 V / 5.0 V tolerant —
Programming Interface IEEE 1149.1 JTAG (ISP) —
工作温度 0 °C to +70 °C (Commercial) 0 C to +70 C (Commercial)
PCI-SIG Compliance Yes (speed grades -4, -5, -6, -7, -10) —
Global Clock Networks 4 (CLK, CLR, OE, GCLK) —
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Device Type — CPLD - Complex Programmable Logic Device
Macro Cells — 256
Logic Gates (Usable) — 5,000
Propagation Delay (tPD) — 7.5 ns
Maximum Internal Frequency — 126.6 MHz
Supply Voltage VCCINT — 3.3 V
I/O Supply Voltage VCCIO — 3.3 V or 2.5 V (MultiVolt)
Programming Technology — EEPROM (non-volatile)
In-System Programmability — Yes, IEEE Std. 1532 compliant
JTAG Boundary Scan — Yes

数据手册与资源

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