EPM3256AQC208-10N vs EPM3256AQI208-10 对比

详细并排对比 EPM3256AQC208-10N 出自 Altera 和 EPM3256AQI208-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3256AQC208-10N EPM3256AQI208-10
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $4.62 $19.95
Series MAX 3000A —
Programmable Type In-System Programmable (EEPROM) —
Number of Macrocells 256 —
Number of Logic Elements/Blocks 16 LABs —
Usable Gates 10,000 5,000
Number of I/O Pins 161 (158 user I/O per Arrow listing) —
Propagation Delay (tpd) 10 ns (max) —
Maximum Counter Frequency 227.3 MHz —
Supply Voltage - Internal 3.0 V to 3.6 V (3.3 V typical) —
工作温度 0C to +70C (Commercial) 0C to +70C (Industrial suffix 'I' per part number)
封装 / 外壳 208-BFQFP / 208-PQFP (28x28 mm) —
安装类型 Surface Mount Surface Mount
ISP Compliance IEEE Std. 1532 —
Boundary Scan IEEE Std. 1149.1 (JTAG) —
I/O Tolerance 5 V tolerant, MultiVolt interface —
RoHS 状态 [DATA_NEEDED: lead-free status - non-RoHS suffix 'N' typically indicates lead-free finish, but datasheet not present in data] Compliant (per lead-free 'Q' suffix)
Family — MAX 3000A
Device Type — CPLD (Complex Programmable Logic Device)
Macro Cells — 256
Logic Elements / LABs — 16 Logic Array Blocks
User I/Os — 161
Propagation Delay (tPD) — 10 ns
Maximum Frequency (fCNT) — 95.2 MHz
Internal Counter Speed — Up to 227.3 MHz
Supply Voltage - Core — 3.3 V
I/O Logic Compatibility — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
Programmability — EEPROM, In-System via JTAG (IEEE 1149.1)
PCI Compliance — PCI Local Bus Specification Revision 2.2
封装 — 208-pin PQFP (Plastic Quad Flat Pack), FQFP code
Terminal Form — Gull-wing SMD

数据手册与资源

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