EPM3256ATC144-7N vs EPM3256ATI144-10N 对比
详细并排对比 EPM3256ATC144-7N 出自 Altera 和 EPM3256ATI144-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3256ATC144-7N | EPM3256ATI144-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $17.20 | $10.25 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD - Complex Programmable Logic Device |
| Macro Cells | 256 | — |
| Logic Gates (usable) | 5,000 | — |
| Number of Logic Array Blocks (LABs) | 16 | — |
| User I/Os | 116 | 116 |
| Propagation Delay (tPD) | 7.5 ns | 10 ns |
| Maximum Internal Frequency | 126.6 MHz | — |
| Supply Voltage (VCCIO) | 3.0 V to 3.6 V | — |
| Programmable Logic Technology | CMOS EEPROM-based | — |
| In-System Programmable (ISP) | Yes (3.3 V) | — |
| 工作温度 | 0C to +70C (Commercial) | -40 C to +85 C (industrial, "I" suffix) |
| 封装 | 144-pin TQFP | 144-pin TQFP |
| 安装类型 | Surface Mount | Surface Mount |
| Logic Family | CMOS | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| RoHS 状态 | Compliant | Compliant |
| Macrocells | — | 256 |
| Usable Gates | — | 5,000 |
| Logic Blocks / Logic Elements | — | 16 |
| Max Frequency (fMAX) | — | 95.2 MHz |
| Supply Voltage - Core | — | 3.3 V |
| I/O Voltage Support | — | 1.8 V / 2.5 V / 3.3 V (multi-voltage) |
| In-System Programmability | — | Yes, IEEE Std. 1532 compliant |
| Boundary-Scan Test (BST) | — | Yes, IEEE Std. 1149.1 (JTAG) |
| Lead-Free / Pb-Free | — | Yes ("N" suffix) |
| Process Technology | — | CMOS EEPROM-based, non-volatile |
| MSL 等级 | — | 3 (per JEDEC J-STD-020, typical for TQFP) |