EPM3256ATC144-7N vs EPM3256ATI144-10N 비교
다음의 상세 나란히 비교: EPM3256ATC144-7N 제조: Altera 및 EPM3256ATI144-10N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM3256ATC144-7N | EPM3256ATI144-10N |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 최종 구매 | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $17.20 | $10.25 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD - Complex Programmable Logic Device |
| Macro Cells | 256 | — |
| Logic Gates (usable) | 5,000 | — |
| Number of Logic Array Blocks (LABs) | 16 | — |
| User I/Os | 116 | 116 |
| Propagation Delay (tPD) | 7.5 ns | 10 ns |
| Maximum Internal Frequency | 126.6 MHz | — |
| Supply Voltage (VCCIO) | 3.0 V to 3.6 V | — |
| Programmable Logic Technology | CMOS EEPROM-based | — |
| In-System Programmable (ISP) | Yes (3.3 V) | — |
| 동작 온도 | 0C to +70C (Commercial) | -40 C to +85 C (industrial, "I" suffix) |
| 패키지 | 144-pin TQFP | 144-pin TQFP |
| 실장 유형 | Surface Mount | Surface Mount |
| Logic Family | CMOS | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| RoHS 상태 | Compliant | Compliant |
| Macrocells | — | 256 |
| Usable Gates | — | 5,000 |
| Logic Blocks / Logic Elements | — | 16 |
| Max Frequency (fMAX) | — | 95.2 MHz |
| Supply Voltage - Core | — | 3.3 V |
| I/O Voltage Support | — | 1.8 V / 2.5 V / 3.3 V (multi-voltage) |
| In-System Programmability | — | Yes, IEEE Std. 1532 compliant |
| Boundary-Scan Test (BST) | — | Yes, IEEE Std. 1149.1 (JTAG) |
| Lead-Free / Pb-Free | — | Yes ("N" suffix) |
| Process Technology | — | CMOS EEPROM-based, non-volatile |
| MSL 레벨 | — | 3 (per JEDEC J-STD-020, typical for TQFP) |