EPM3512AFC-7N vs EPM3256AFC256-10N 对比

详细并排对比 EPM3512AFC-7N 出自 Intel 和 EPM3256AFC256-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3512AFC-7N EPM3256AFC256-10N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 Obsolete
库存状态 有库存 有库存
单价(USD) $26.40 $25.95
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 512 256
Logic Array Blocks (LABs) 16 —
User I/Os 208 —
Dedicated Inputs 16 —
Propagation Delay (tPD) 7.5 ns (speed grade -7) —
封装 BGA-256 (FineLine BGA) 256-pin FineLine BGA
Logic Family CMOS, EEPROM-based CMOS
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) MultiVolt: 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant —
In-System Programmability Yes - IEEE Std. 1532 / JTAG (IEEE 1149.1) —
Programming Interface JTAG (4-wire TCK/TMS/TDI/TDO) —
工作温度 0 C to +70 C (commercial) 0 C to 70 C (commercial)
安装类型 Surface Mount (BGA) —
RoHS 状态 [DATA_NEEDED: RoHS status] —
Usable Gates — 5,000 gates
Maximum User I/O — 161
Pin-to-Pin Logic Delay — 10 ns
Maximum Counter Frequency — 227.3 MHz
Core Voltage — 3.3 V
I/O Logic Level Compatibility — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
Programmability — EEPROM, in-system programmable (ISP)
JTAG Interface — IEEE 1532 / JTAG (TDI, TDO, TMS, TCK)
PCI Compliance — PCI Local Bus Specification Rev 2.2 (at -10 grade)

数据手册与资源

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