EPM3512AFC256-22 vs EPM3512AFC256-10 对比
详细并排对比 EPM3512AFC256-22 出自 Intel 和 EPM3512AFC256-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3512AFC256-22 | EPM3512AFC256-10 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $16.10 | $17.50 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O Pins | 208 (typical for FC256 package) | — |
| Speed Grade | -22 (tPD ~22 ns) | — |
| Propagation Delay (tPD) | 22 ns | — |
| Supply Voltage VCCINT | 3.3 V | — |
| I/O Standards Supported | 2.5 V, 3.3 V, 5.0 V (VCCIO selectable) | — |
| In-System Programming | IEEE Std. 1532-compliant ISP via JTAG | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| 封装 | FC-256 (FineLine BGA, 256 balls, 1.0 mm pitch) | 256-pin FBGA |
| 安装类型 | Surface Mount (BGA) | Surface Mount |
| 工作温度 | [DATA_NEEDED: operating temperature grade] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | unknown |
| Usable Gates | — | 10,000 |
| Maximum I/O Pins | — | 208 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 87 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5-V tolerant |
| Programmable Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE Std. 1149.1 JTAG / IEEE Std. 1532) |
| 工作温度范围 | — | [DATA_NEEDED: industrial/commercial operating temperature range] |
| 引脚数量 | — | 256 |
| Architecture | — | MAX (Multiple Array matriX) EEPROM-based |