EPM3512AFC256-23 vs EPM3256AFC256-10 对比

详细并排对比 EPM3512AFC256-23 出自 Altera 和 EPM3256AFC256-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM3256AFC256-10 EPM3256AFC256-10 - 256-Macro CPLD MAX 3000A | Intel / Altera | FBGA-256

EPM3256AFC256-10 - 256-Macro CPLD MAX 3000A | Intel / Altera | FBGA-256

EPM3256AFC256-10 ⚠ 最后一次采购

规格对比

参数 EPM3512AFC256-23 EPM3256AFC256-10
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $15.75 $19.95
Family MAX 3000A MAX 3000A
Macrocells 512 —
Usable Gates 10,000 5,000
Logic Array Blocks (LABs) 16 (32 macrocells each) 16 (16 macrocells each)
Maximum Operating Frequency 178.6 MHz —
Propagation Delay (tPD) 5.5 ns 10 ns
Pin-to-Pin Delay 23 ns —
Supply Voltage (VCCINT) 3.3 V 3.3 V
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (MultiVolt) —
User I/O Pins [DATA_NEEDED: user I/O count for FC256] —
封装 256-ball FineLine BGA (FC256), 17 mm x 17 mm 256-ball FBGA (Fine-Line BGA)
Programming Interface JTAG (IEEE Std. 1149.1) / ISP —
Process Technology 0.30 µm CMOS EEPROM —
工作温度 [DATA_NEEDED: operating temperature grade] 0°C to +70°C (Commercial)
安装类型 Surface Mount (BGA) Surface Mount
Logic Family — CMOS (EEPROM-based)
Device Type — CPLD (Complex Programmable Logic Device)
Macro Cells — 256
Maximum User I/Os — 161
Internal Counter Frequency (fCNT) — 95.2 MHz
I/O Voltage Tolerance — 5.0 V tolerant
In-System Programmability — Yes (3.3 V ISP via JTAG IEEE 1149.1)
Pitch — [DATA_NEEDED: BGA ball pitch]
RoHS 状态 — [DATA_NEEDED: RoHS compliance status]

数据手册与资源

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