EPM3512AQ208-10N vs EPM3256AQI208-10N 对比
详细并排对比 EPM3512AQ208-10N 出自 Altera 和 EPM3256AQI208-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3512AQ208-10N | EPM3256AQI208-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $21.40 | $9.75 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 512 | 256 |
| Usable Gates | 10,000 | 5,000 |
| User I/Os | 172 | 161 |
| Logic Array Blocks (LABs) | 32 | — |
| 封装 | 208-pin PQFP | 208-pin PQFP (Plastic Quad Flat Pack) |
| Speed Grade | -10 (10 ns pin-to-pin delay) | -10 |
| Pin-to-Pin Delay (tPD) | 4.5 ns (typical) | — |
| Maximum Frequency (fCNT) | 227.3 MHz | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V, 3.3 V, or 5.0 V | — |
| Process Technology | CMOS EEPROM | CMOS EEPROM |
| Programming Interface | IEEE Std. 1532 (JTAG) ISP | JTAG (IEEE 1149.1) ISP |
| Operating Temperature (Industrial) | -40 C to +85 C | — |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | unknown | Non-compliant (Pb-bearing PQFP package) |
| Logic Elements / LABs | — | 16 Logic Array Blocks (LABs) |
| Propagation Delay (tPD) | — | 10 ns |
| Counter Frequency | — | 118.7 MHz (max, -10 speed grade) |
| Supply Voltage - Core | — | 3.3 V |
| I/O Logic Level Compatibility | — | 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O) |
| 工作温度 | — | -40 C to +85 C (industrial) |
| Hot-Socketing Support | — | Yes |