EPM3512AQC208-3 vs EPM3512AQC208-2 对比
详细并排对比 EPM3512AQC208-3 出自 Altera 和 EPM3512AQC208-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM3512AQC208-3 - MAX 3000A CPLD, 512 Macrocells, 172 I/O, PQFP-208 | Altera
EPM3512AQC208-3 ⚠ 最后一次采购规格对比
| 参数 | EPM3512AQC208-3 | EPM3512AQC208-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $27.80 | $18.75 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 (32 macrocells each) | 16 |
| Maximum User I/O Pins | 172 | — |
| 封装 | PQFP-208 | PQFP-208 (QC) |
| Speed Grade | -3 | -2 |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| I/O Bank Supply Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (multiVolt) | — |
| In-System Programmability | Yes (IEEE Std. 1532 compliant) | Yes (IEEE 1149.1 JTAG) |
| Boundary-Scan Test | Yes (IEEE Std. 1149.1 / JTAG) | — |
| Program/Erase Cycles | 100 minimum [DATA_NEEDED: exact datasheet figure] | — |
| Non-Volatile Configuration | Yes (EEPROM-based) | — |
| 工作温度 | [DATA_NEEDED: industrial/commercial grade range] | — |
| RoHS 状态 | [DATA_NEEDED: confirm from datasheet] | Non-compliant (legacy PQFP) |
| 安装类型 | Surface Mount | Surface Mount |
| MSL 等级 | [DATA_NEEDED: moisture sensitivity level] | — |
| User I/O Pins | — | 172 |
| Supply Voltage (Core) | — | 3.3 V |
| Output Drive Voltage | — | 2.5 V / 3.3 V programmable |
| Input Voltage Tolerance | — | 2.5 V / 3.3 V / 5.0 V |
| Process Technology | — | 0.30 µm EEPROM |
| Program/Erase Endurance | — | 100 cycles (typical) |
| User I/O Banks | — | 4 |
| 工作温度范围 | — | Commercial (0C to +70C) |
| Lead-Free | — | No (SnPb lead finish) |
| Security Bit | — | Yes (programmable) |