EPM3512AQC208-7N vs EPM3512AQC208-7 对比
详细并排对比 EPM3512AQC208-7N 出自 Altera 和 EPM3512AQC208-7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM3512AQC208-7 - MAX 3000A CPLD, 512 Macrocells, 7.5ns, 208-PQFP | Intel
EPM3512AQC208-7 Nrnd规格对比
| 参数 | EPM3512AQC208-7N | EPM3512AQC208-7 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $41.41 | $41.72 |
| Family | MAX 3000A | MAX 3000A |
| Logic Capacity | 512 macrocells, 10,000 usable gates | — |
| Logic Array Blocks (LABs) | 32 | — |
| Macrocells per LAB | 16 | — |
| User I/Os | 172 | 172 |
| Propagation Delay (tPD) | 7.5 ns | 7.5 ns |
| Maximum Frequency (fCNT) | 116.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V (3.0 V to 3.6 V) | 3.3 V |
| I/O Bank Count | 4 (MultiVolt) | — |
| Supported I/O Standards | 1.8 V / 2.5 V / 3.3 V LVTTL/LVCMOS | — |
| Process Technology | 0.30 µm CMOS EEPROM | CMOS EEPROM, 0.30 um |
| Configuration | Non-volatile EEPROM, in-system programmable (ISP) | — |
| JTAG Interface | IEEE 1149.1 BST + IEEE 1532 ISP | — |
| 封装 | 208-Pin PQFP / FQFP-208 (Plastic Quad Flat Pack, gull-wing) | 208-Pin PQFP (FQFP, gull-wing) |
| 工作温度 | 0 °C to +70 °C (commercial) | 0 C to +70 C (commercial) |
| RoHS 状态 | Compliant | Compliant |
| Speed Grade | -7 | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 512 |
| Usable Gates | — | 10,000 |
| Counter Frequency (fCNT) | — | 116.3 MHz |
| Logic Elements / LEs | — | N/A (CPLD macrocell architecture) |
| I/O Standards Supported | — | 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O) |
| Programming | — | In-System Programmable via JTAG (IEEE Std. 1532) |
| Lead-Free | — | Yes |