EPM3512AQC210-7 vs EPM3512AQI210-10 对比
详细并排对比 EPM3512AQC210-7 出自 Altera 和 EPM3512AQI210-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3512AQC210-7 | EPM3512AQI210-10 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $21.85 | $19.95 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O Pins | 172 | 212 |
| Dedicated Input Pins | 12 | — |
| 封装 | PQFP-208 | PQFP-210 |
| 引脚数量 | 208 | — |
| 安装类型 | Surface Mount | Surface Mount |
| Operating Voltage (Core) | 3.3 V | — |
| Min Supply Voltage | 3.0 V | — |
| Max Supply Voltage | 3.6 V | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) | — |
| Pin-to-Pin Delay | 7 ns (speed grade -7) | — |
| Speed Grade | 7 ns | — |
| In-System Programmability | Yes (JTAG, IEEE 1149.1) | — |
| 工作温度 | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) |
| Non-Volatile Configuration | Yes (EEPROM-based) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: rohs_status] |
| Usable Gates | — | 10,000 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage (MultiVolt) | — | 1.8 V / 2.5 V / 3.3 V / 5 V tolerant |
| Programming Interface | — | JTAG (IEEE 1149.1 / IEEE 1532) |
| In-System Programmable | — | Yes (ISP via JTAG) |
| Configuration Memory | — | Non-volatile EEPROM |