EPM5016DC-15 vs EPM5016LC-17 对比
详细并排对比 EPM5016DC-15 出自 Altera 和 EPM5016LC-17 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5016DC-15 | EPM5016LC-17 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $10.75 | $10.95 |
| Device Family | MAX 5000 | — |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 16 | 16 |
| Logic Array Blocks (LABs) | 2 | — |
| Dedicated Inputs | 4 | 7 |
| User I/O Pins | 12 | — |
| Pin-to-Pin Delay (tpd) | 15 ns | — |
| Maximum Frequency (fmax) | 71 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Programming Voltage (VPP) | 12.75 V | — |
| 工作温度 | 0 °C to 70 °C (commercial) | [DATA_NEEDED: temperature grade] |
| 封装 | Ceramic DIP-24 (windowed) | Windowed Ceramic DIP (LC) |
| 安装类型 | Through-Hole | — |
| Process Technology | CMOS EPROM | — |
| Configuration Memory | Non-volatile UV-erasable EPROM | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status - pre-RoHS era part, likely non-compliant] | [DATA_NEEDED: RoHS compliance] |
| Lead Finish | [DATA_NEEDED: lead-free status] | — |
| Family | — | MAX 5000 EPLD |
| Technology | — | CMOS, UV-erasable |
| Product Terms | — | 160 |
| I/O Pins | — | 8 |
| Total Input Pins | — | 16 |
| Outputs | — | 8 |
| External Clock Inputs | — | 1 |
| Propagation Delay (tPD) | — | 17 ns |
| Architecture | — | PAL-type with Programmable Interconnect Array (PIA) |
| 电源电压 | — | [DATA_NEEDED: VCC range] |
| Logic Compatibility | — | TTL/CMOS |