EPM5032DC-2 vs EPM5128GC 对比

详细并排对比 EPM5032DC-2 出自 Altera 和 EPM5128GC 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5032DC-2 EPM5128GC
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $8.75 $19.20
Product Type CPLD (Complex Programmable Logic Device) —
Series MAX 5000 —
Macrocells 32 128
Usable Gates (typical) 600 —
Logic Array Blocks (LABs) 4 —
封装 20-pin CDIP (Ceramic DIP) —
Speed Grade -2 (tPD ~25 ns, commercial) —
Configuration Memory EPROM (one-time programmable per generation; UV-erasable variants exist) Non-volatile UV-EPROM (windowed ceramic)
Supply Voltage (VCC) 5 V (single supply, +/-5%) —
工作温度 0C to +70C (commercial grade) —
Programmable Pins / I/O 20 pins (JEDEC-standard 0.300" ceramic DIP) —
Programming Interface Altera ByteBlaster / parallel-port JTAG-style ISP —
Interconnect Programmable Interconnect Array (PIA) with deterministic timing —
RoHS 状态 [DATA_NEEDED: RoHS compliance - CDIP package typically pre-RoHS] [DATA_NEEDED: RoHS compliance]
安装类型 Through-Hole (DIP) Through-Hole (PGA socket required)
MSL 等级 Not applicable (through-hole hermetic ceramic) —
Family — MAX 5000
Usable Gates — 2,500
Logic Elements / LABs — [DATA_NEEDED: LAB count]
User I/Os — 68
Package Type — WPGA (Windowed Ceramic Pin Grid Array)
Package Code — WPGA
Number of Terminals — 68
Terminal Form — PIN/PEG (through-hole PGA with alignment pegs)
Package Shape — Square
Temperature Grade — Commercial
Supply Voltage (Vcc) — 5 V
Process Technology — CMOS, UV-erasable
Architecture — EPLD, programmable AND/OR array with fixed OR plane
Propagation Delay (tpd) — [DATA_NEEDED: tpd in ns]
Maximum Frequency (fmax) — [DATA_NEEDED: fmax in MHz]
Programmable Security Bit — Yes

数据手册与资源

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