EPM5032DC-25 vs EPM5032DC-20 对比

详细并排对比 EPM5032DC-25 出自 Altera 和 EPM5032DC-20 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5032DC-25 EPM5032DC-20
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $3.55 $5.05
Manufacturer Altera (Intel Programmable Solutions Group) Altera (now Intel Programmable Solutions Group)
Product Family MAX 5000 MAX 5000
Device Type UV Erasable Programmable Logic Device (EPLD) CPLD (Complex Programmable Logic Device)
Macrocells 32 32
Pin-to-Pin Propagation Delay (tPD) 25 ns —
Maximum Counter Frequency (fCNT) [DATA_NEEDED: maximum counter frequency] —
Setup Time (tSU) [DATA_NEEDED: setup time] —
Number of Dedicated Inputs 32 (in DIP-28 pinout) —
Number of I/O Pins 22 (in DIP-28 pinout, 4 used as dedicated inputs) —
封装 CDIP-28 (Windowed Ceramic DIP-28) 20-pin DIP (Windowed Ceramic, 0.3" wide)
Process Technology CMOS, EPROM (UV-Erasable) —
Architecture PAL-Type, Single-LAB, 32-Macrocell —
Output Structure Programmable I/O with output enable —
Flip-Flop Configuration D, T, JK, or SR (programmable) —
工作温度 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: commercial/industrial/military grade]
RoHS 状态 Lead Free / RoHS Compliant (per distributor listings) Compliant (per IC-Components listing)
Programming Method UV erase + Altera/Intel MAX+PLUS II programmer Altera MAX+PLUS II / Quartus (legacy support)
Erasure Method UV light through ceramic window —
Programmable Technology — UV-Erasable / OTP EPROM
Usable Gates — 600
Maximum Frequency (fCNT) — 71.4 MHz
Pin-to-Pin Delay (tPD) — 20 ns
Speed Grade — -20
Supply Voltage (VCC) — 5 V
安装类型 — Through-Hole
Logic Blocks — 4 Logic Array Blocks (LABs)
I/O Pins — [DATA_NEEDED: I/O pin count for DIP-20 variant]
Lead Free — [DATA_NEEDED: confirmed lead-free]

数据手册与资源

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